1. Field of the Invention
The present invention relates to a circuit for voltage multiplication in which a capacitor is connectible via first switching transistors to a supply voltage source and connectible via further first switching transistors in series with the supply voltage source and with a storage capacitor connected parallel to a circuit output, and in which a clock voltage generator drives the first switching transistors and is switchable with respect to the clock voltage amplitude from a value corresponding to the supply voltage to a value corresponding to the output voltage.
2. Description of the Prior Art
A circuit of the type generally set forth above is known from the IEEE Journal of Solid State Circuits, Vol. SC-17, No. 4, August 1982, pp. 778-781. In this circuit, the clock voltage generator which supplies the clock voltage for generating the switching transistors is only connected to the supply voltage as long as the output voltage does not exceed the supply voltage. When, however, the output voltage is greater than the supply voltage, the clock voltage generator is switched from the latter to the former, so that the clock voltages alternate about 0 volts and the amplitude of the output voltage. This is necessary in order to prevent the efficiency of the circuit from being too greatly reduced due to incompletely inhibited switching transistors. A disconnection of the clock voltage generator from the supply voltage thereby occurs by way of a diode which is disposed in series with the supply voltage input. It is therefore disadvantageous that a supply voltage drops off at the diode operated in the on state, the effective supply voltage being thereby reduced. This is particularly disruptive when the supply voltage is relatively low, since the efficiency of the circuit is therefore reduced to a correspondingly high degree.